input i_start_addr ;
input num_pad_y ;
input i_en ;
input i_sram_ren0 ;
input i_sram_raddr0 ;
input i_wdata0 ;
input i_sram_ren1 ;
input i_sram_raddr1 ;
input i_wdata1 ;
input i_sram_ren2 ;
input i_sram_raddr2 ;
input i_wdata2 ;
input i_sram_ren3 ;
input i_sram_raddr3 ;
input i_wdata3 ;
input i_sram_ren4 ;
input i_sram_raddr4 ;
input i_wdata4 ;
input i_sram_ren5 ;
input i_sram_raddr5 ;
input i_wdata5 ;
output o_ready ;
--
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